Recently, the research team led by Professor Yang Yuchao from the School of Electronic and Computer Engineering (SECE), Peking University, and the Guangdong Provincial Key Laboratory of In-Memory Computing Chips reported an important advance in memristor-based neuromorphic computing. The team developed a novel neuromorphic computing system integrating homeostatic neurons with artificial dendritic structures, providing a new technological approach to low-power and high-efficiency brain-inspired computing chips.

With the rapid development of artificial intelligence, speech interaction, and the Industrial Internet of Things, conventional computing systems based on the von Neumann architecture face growing challenges when processing complex temporal data, including high energy consumption, latency, and data-movement bottlenecks. By contrast, the brain can process complex information efficiently at extremely low power through the rich spatiotemporal dynamics of neurons, dendrites, and synapses. Neuromorphic computing, which seeks to emulate these biological mechanisms, is therefore regarded as a promising approach to next-generation energy-efficient intelligent computing. However, existing neuromorphic hardware systems often lack effective implementations of neuronal homeostatic regulation and dendritic computation, limiting their performance and stability in complex temporal processing tasks.

Figure 1. Memristor-based neuromorphic computing system integrating volatile and non-volatile memristors

To address these challenges, Professor Yang’s team proposed a neuromorphic computing system based on theco-integratedvolatile and non-volatile memristors, enabling an architecture that combines homeostatic regulation with dendritic computation. By exploiting the threshold-switching characteristics of volatile VO₂ memristors, the team constructed a homeostatic neuron capable of regulating its firing behaviour. Following external perturbations, the neuron can autonomously restore its activity towards a stable firing state, thereby emulating the homeostatic regulation mechanism of biological neural systems. The underlying feedback mechanism allows the neuron to sense and regulate its activity, improving stability during continuous temporal information processing.

Figure 2. Homeostatic neuron based on a volatile VO₂ memristor

For dendritic processing, the team exploited the multilevel conductance modulation capability of non-volatile HfO₂-based memristors to construct artificial dendritic structures with programmable delays. By tuning the memristor conductance, the dendritic structures generate programmable spike delays across different timescales, thereby emulating key features of nonlinear dendritic computation and spatiotemporal integration in biological neurons. The programmable delays also enable the network to capture temporal features across multiple timescales.

Figure 3. Dendritic structure based on non-volatile HfO₂-based memristors

Building on these technologies, the team developed a board-level neuromorphic computing system and evaluated it in both industrial fault diagnosis and speech recognition tasks, demonstrating its potential for a range of edge-computing applications. The hardware platform integrates the homeostatic neurons and dendritic structures within a spiking neural network (SNN) architecture. In the industrial fault-diagnosis task, the SNN incorporating homeostatic neurons achieved an average classification accuracy of92.14%, an improvement of 4.83%over a network based on conventional leaky integrate-and-fire (LIF) neurons. The results further showed that homeostatic regulation enhances network stability and information retention during long-duration continuous temporal signal processing. In the speech-recognition task, the SNN integrating homeostatic neurons with programmable dendritic structures achieved an average classification accuracy of 86.53%, representing a 3.50%improvement over the baseline network. The results demonstrate the complementary roles of homeostatic regulation and dendritic computation: homeostatic neurons enhance stability and adaptation, while dendritic structures improve temporal feature extraction.

Hardware evaluation further demonstrated the area and energy-efficiency advantages of the proposed architecture. At the 180 nm technology node, the homeostatic neuron achieves an estimated energy consumption of 19.29 pJ per spike, while the system-level implementation for the speech-recognition task achieves a compact area of approximately 0.102 mm⟡. These results demonstrate the potential of the architecture for compact and energy-efficient neuromorphic hardware and low-power edge-intelligence applications.

Figure 4. Hardware implementation for the industrial fault-diagnosis task

The research was published in Nature Communications under the title “Homeostatic dendritic neuron based on co-integrated volatile and non-volatile memristors for neuromorphic processing.” Zhang Licheng, a master’s student who enrolled at SECE in 2023, is the first author of the paper. Professor Yang Yuchao, Dean of SECE and Director of the Guangdong Provincial Key Laboratory of In-Memory Computing Chips, is the corresponding author. The research was supported by the National Key R&D Program of China, the National Natural Science Foundation of China, the Guangdong Provincial Key Laboratory of In-Memory Computing Chips, and the New Cornerstone Investigator Program, among other funding sources.

Reference:

Zhang, L., Zhang, T., Tiw, P.J. et al. Homeostatic dendritic neuron based on co-integrated volatile and non-volatile memristors for neuromorphic processing. Nat Commun 17, 6918 (2026). https://doi.org/10.1038/s41467-026-73669-x